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[AL2010] rev. 1.0 2011/08 1 general discription AL2010 is the current-mode synchronous step-down dc -dc convertor which offers excellent transient response. output voltage is selectable between 0.8v and 5.0v by the external resister. input voltage r ange is between 3.0v and 5.5v, and it is the most suitable to generate 1.0v, 1.2v, and 1.8v. power mosfets are built in AL2010, which is maximum current is 2.5a. the sw itching frequency is selectable between 300 khz and 4 mhz by the external resister. for the protections, AL2010 has over-current protection, low-input volta ge protection, and power-good function. feature step down dcdc converter ? input voltage range: 3.0v to 5.5v ? output voltage range: 0.8v to 5.0v (by the external resister) ? maximum output load current: 2.5a ? operation temperature: -40 c to 85 c ? switching frequency: 300khz to 4mhz (selectable by an external resister. and available external synchronous mode by the external clock) ? low input voltage protection ? power-good function ? over-current protection (automatic recovery type) ? thermal protection ? internal reference voltage: 1.5% (ta = 25 c) ? maximum duty: 100% ? soft start function ? pkg: tssope-16 current-mode pwm step-down dc-dc convertor AL2010
[AL2010] rev. 1.0 2011/08 2 block diagram cc fb fbamp ss ssss ss 1v - + gnd vin - + uvlocomp control logic ss vcnt. pwm.comp iss+ reset osc osc osc osc reset - + + - - + ovpcomp fb iramp reset set oclcomp pwon enable pwgd osc 0.6v - + + - pwgdcomp -+ 0.6v1.25 -+ 0.6v0.75 ss_end 0.6v 1.3 -+ vin + a vs+ vs- vs+ vs- sw iss- 0.6vss fsyn vin 0.6v 0.6v figure 1. AL2010 block diagram
[AL2010] rev. 1.0 2011/08 3 pin location & typical operation circuit figure 2. pin location (top view) pin & function no. pin name function no. pin name function 1 pwgd powergood 9 vin supply input 2 fsyn external synchronous clock input 10 sw switching node output 3 pwon poweron 11 sw switching node output 4 rt frequency setting 12 pgnd power ground 5 sgnd signal ground 13 pgnd power ground 6 ss soft start 14 sw switching node output 7 cc output of feedback amplifier 15 sw switching n ode output 8 fb feedback input 16 vin supply input 1 1 2 2 3 3 4 4 5 5 6 6 d d c c b b a a title number revision size b date: 2010/03/01 sheet of file: c:\documents and settings\..\AL2010_100301.sch doc drawn by: vin sw sw ss vi n vi n vi n vi n vo ut vo ut vo ut vo ut pwg d pwg d pwg d pwg d pwgd sgnd fb AL2010 AL2010 AL2010 AL2010 syn c syn c syn c syn c cc rt fsyn vin sw pgnd pgnd sw pwo n pwo n pwo n pwo n c1 c2 c3 c4 c5 l1 d1 r1 r2 r3 r4 r5 pwon
[AL2010] rev. 1.0 2011/08 4 absolute maximum rating (gnd=0v; note 1) parameter symbol min max units vin pin vin ? 0.3 6.0 v sw pin vsw ? 0.3 vin + 0.3 v all pins (except sw pin, vin pin) vind ? 0.3 vin v junction temperature tj 125 c operating ambient temperature ta ? 40 85 c storage ambient temperature tstg ? 40 150 c power dissipation (ta = 25 c) pd 2000 mw note1. all voltages with respect to ground. warning: operation at or beyond these limits may re sult in permanent damage to the device. normal operation is not guaranteed at these extr emes. recommended operating conditions (gnd=0v) parameter symbol min typ max units vin pin voltage vin 3.0 ? 5.5 v output current iout 0 ? 2.5 a operating ambient temperature ta ? 40 ? 85 c *akpd assumes no responsibility for the usage beyon d the conditions in this datasheet.
[AL2010] rev. 1.0 2011/08 5 electrical characteristics (vin=5.0v, ta=25 c, unless otherwise specified) parameter symbol conditions min typ max units operating input voltage range vin 3.0 5.5 v feedback ref voltage v fb_ref 591 600 609 mv operation current consumption i suuly no switching 0.48 0.8 1.12 ma standby current istandby poweroff 10 a load regulation *1 v load 1 % rpmos pmos r ds(on) 10 65 100 m mosfet r ds(on) rnmos nmos r ds(on) 10 65 100 m overcurrent detection ioclpeak 3.15 4.5 a oscillator frequency fosc 300 4000 khz fext300 rt=702k (at 300khz) 240 360 khz fsyn input frequency range fext2000 rt=100k (at 2mhz) 1600 2400 khz oscillator accuracy facu rt=100k (at 2mhz) 20 0 2 0 % maximum on duty maxduty *2 100 % uvlo vuvlo voltage at lock 2.30 2.50 2.84 v uvlo return voltage voltage at release 2.36 2.70 2 .90 v uvlo (hysteresis) vuv_hys uvlo hysteresis width 0.0 6 0.20 v output over voltage detection vovp against v fb_ref +26 +30 +34 % charge current (to capacitor of soft start) iss+ css=0v 1.0v (at rise) 18.0 20.0 22.0 a discharge current (to capacitor of soft start) iss css=1.0v 0.40v (at fall) 0.75 1.0 1.25 a thermal protection detection *2 150 c thermal protection hysteresis *2 15 c power good detection against v fb_ref 16 20 24 % power good nondetection against v fb_ref 21 25 29 % power good hysteresis 3 5 7 % poweron threshold vponl 0.4 v poweroff threshold vponh 1.5 v poweron hysteresis 50 100 150 mv gm (cc pin) 400 500 600 s *1. for reference value by the recommended circuit *2. guaranteed by design and characterization dc characteristics (ta=25 c, unless otherwise specified) parameter symbol condition min typ max units veih 0.7*vdd ? ? v fsyn(input pin) threshold voltage veil ? ? 0.3*vdd v vpoh ipoh=100 a vdd0.4 ? ? v pwgd(output pin) voltage vpol ipol=100 a ? ? 0.4 v
[AL2010] rev. 1.0 2011/08 6 recommended circuitry & pcb layout d1 l1 r2 c1 r1 c2 vin pwgd pwon c4 c5 r4 r5 r3 fsyn vout c3 gnd1 gnd2 sw 11 sw 15 sgnd 5 ss 6 vin 16 pgnd 13 sw 14 pgnd 12 cc 7 fsyn 2 rt 4 fb 8 pwgd 1 pwon 3 vin 9 sw 10 ic1 figure 3. one example of recommended circuitry figure 4. pcb layout
[AL2010] rev. 1.0 2011/08 7 pin discription 1 pin_pwgd: powergood pin. when the output voltage achieved to 20% of set voltage, this pin becomes hi. 2 pin_fsyn: external synchronous clock input pin. internal pull up resistor is 300k . the external clock within 20% of relative value is available, which is to the intern al clock, and it is set by the resistor at rt pin. 3 pin_pwon: poweron pin. it starts in the voltage which is 1.5 v and more. 4 pin_rt: the setup pin of operation frequency. it is the set up by a resistor. 5 pin_sgnd: signal ground pin. 6 pin_ss: soft start pin. it should connect the capacitor of 0.047uf and more between ss pin and gnd. it charges an exte rnal capacitor at the time of startup, and soft start wo rks. and, when the AL2010 is in the protection state of over current, the external capacitor is discharged and it makes t he stop time in a hiccup operation. 7 pin_cc: output pin of output voltage feedback amplifier. a resistor and a capacitor are placed in a parallel connection, and those are connected between cc pin and vref/ss pin. and those compensate a phase of an amplifier. 8 pin_fb: input pin of output voltage feedback amplifier. the voltage is controlled so that this pin voltage beco mes 0.6v. two resistors for the feedback should be plac ed in a series between the output stage and gnd, and the connected point of two should be connected to fb pi n. 9 pin, 16pin_vin: input pin of main power voltage. a capacitor should be placed between vin pin and gnd, which is 4.7uf and more. 10 pin, 11 pin, 14 pin, 15 pin_sw: output pin of the internal switching mosfet. 12 pin, 13 pin_pgnd: power ground pin.
[AL2010] rev. 1.0 2011/08 8 timing chart at start-up pwon/mode vout ocl? ss_end vin 100 vref vref/ss ovp? 0 100 130 0 ocl&ovp pwm 50 50 figure 5. start up timing ocl level ovp level ocl&ovp control pwm control
[AL2010] rev. 1.0 2011/08 9 timing chart at over current protection ocl? ocl?` 100 ss 0 ocl t1 t3 t2 1.0v 0.4v t4 css?` rg_ when css=0.1uf, t1 soft start time is 5ms, t3 rest time is 60ms, t2 256us 512 clocks/2mhz t4 192us 384 clock/2mhz when css=0.22uf, t1 soft start time is 11ms, t3 rest time is132ms figure 6. over current protection timing ocl level ocl timer ocl counter css discharge time
[AL2010] rev. 1.0 2011/08 10 timing chart by external synchronous fsyn ? ? pg ? ? ? ? fsyn vin ` AL2010? ??? vth>0.4v 0.4v `???? ? `??? 200k 1 2 : ? figure 7. external synchronous timing fixed un fixed (1) (2) (1) when the period of fsyn=hi is longer than one cycle of internal clock, the operation clock is ac cording to internal clock. (2) when the period of fsyn=hi is shorter than on e cycle of internal clock, the operation clock is a ccording to external clock. the external clock which is as the relative value w ithin 20% of the internal clock frequency which depends on th e resistor of rt pin can be inputted to AL2010. gate input open collector or open drain it must be less than 0.4v. external synchronous clock internal clock
[AL2010] rev. 1.0 2011/08 11 characteristic example vin=5v vout=1.8v f=2.2mhz vin=5v vout=1.5v f=2.0mhz figure 8. characteristic example marking AL2010 xxxyy 1) pin #1 indication 2) date code : xxxyy (5 digits) xxx: date code yy: lot# 3) marketing code : AL2010 figure 9. package marking (top view) 0 10 20 30 40 50 60 70 80 90 100 0.0 0.5 1.0 1.5 2.0 2.5 efficiency[%] output current[a] vin=4.5[v] vin=5.0[v] vin=5.5[v] 0 10 20 30 40 50 60 70 80 90 100 0.0 0.5 1.0 1.5 2.0 2.5 efficiency[%] outpur current[a] vin=4.5[v] vin=5.0[v] vin=5.5[v]
[AL2010] rev. 1.0 2011/08 12 package information 16pin tssope unit ? ? ? ? unit: mm figure 10. package dimensions 0 b 8b 0.105 0.175 6.400.10 4.400.10 1 8 16 9 0.65 0.195 0.275 5.000.1 0.100.05 s 0.600.10 1.10max (2.80) (2.80) b a 0.900.05 m 0.10 ab s 0.10 s
[AL2010] rev. 1.0 2011/08 13 important notice these products and their specifications are subject to change without notice. when you consider any use or application of these p roducts, please make inquiries the sales office of asahi kasei microdevices corporation (akm) or authorized distributors as to current status of the products. descriptions of external circuits, application circ uits, software and other related information contai ned in this document are provided only to illustrate the operat ion and application examples of the semiconductor products. you are fully responsible for the incorpo ration of these external circuits, application circ uits, software and other related information in the desig n of your equipments. akm assumes no responsibility for any losses incurred by you or third parties arising from the use of these information herein. akm assu mes no liability for infringement of any patent, intellect ual property, or other rights in the application or use of such information contained herein. any export of these products, or devices or systems containing them, may require an export license or other official approval under the law and regulations of the country of export pertaining to customs and tar iffs, currency exchange, or strategic materials. akm products are neither intended nor authorized fo r use as critical components note1) in any safety, life support, or other hazard related device or system note2) , and akm assumes no responsibility for such use, except for the use approved with the express writte n consent by representative director of akm. as use d here: note1) a critical component is one whose failure to functi on or perform may reasonably be expected to result, whether directly or indirectly, in the loss of the safety or effectiveness of the device or system con taining it, and which must therefore meet very high standards of pe rformance and reliability. note2) a hazard related device or system is one designed o r intended for life support or maintenance of safet y or for applications in medicine, aerospace, nuclear en ergy, or other fields, in which its failure to func tion or perform may reasonably be expected to result in loss of lif e or in significant injury or damage to person or p roperty. it is the responsibility of the buyer or distributo r of akm products, who distributes, disposes of, or otherwise places the product with a third party, to notify su ch third party in advance of the above content and conditions, and the buyer or distributor agrees to assume any a nd all responsibility and liability for and hold ak m harmless from any and all claims arising from the u se of said product in the absence of such notificat ion.

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